Difference between revisions of "FPGA"

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(Created page with "As of August 2022, Grid'5000 features 2 nodes equipped with an FPGA. Those FPGAs are AMD/Xilinx Alveo Datacenter Accelerators U200: https://www.xilinx.com/products/boards-and...")
 
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As of August 2022, Grid'5000 features 2 nodes equipped with an FPGA.
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As of August 2022, Grid'5000 features 2 nodes, each equipped with one AMD/Xilinx FPGA.
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[[File:AMD Xilinx Alveo U200.jpg|thumb|right|AMD Xilinx Alveo U200]]
  
Those FPGAs are AMD/Xilinx Alveo Datacenter Accelerators U200: https://www.xilinx.com/products/boards-and-kits/alveo/u200.html.
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== Hardware description ==
The FPGAs installed in the servan-1 and servan-2 nodes of Grenoble. They are passively cooled.
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The Grenoble site of Grid'5000 hosts 2 servers ([[Grenoble:Hardware#servan|Servan cluster]]) equipped with an AMD/Xilinx FPGA. FPGA are [https://www.xilinx.com/products/boards-and-kits/alveo/u200.html AMD/Xilinx Alveo U200], which are PCIe Accelerator card.
  
Each Alveo U200 FPGA features 2 100Gbps Ethernet interfaces, which are connected to Grenoble site's network.  
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Detailed specifications are provided [https://www.xilinx.com/products/boards-and-kits/alveo/u200.html#specifications here] (cards with passive thermal cooling).
* Those Ethernet interfaces do not appear by default on the host system (Linux). FPGAs can be programmed to use those Ethernet interfaces.
 
* Kavlan can be used to change the VLAN to which those interfaces are connected, just like a network interface of any node.
 
  
A USB cable is connected between each FPGA and its hosting machine, allowing the flash the non-volatile memory available on the FPGA PCI card (with Xilinx Vivado).
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Technically, the installation of those FPGAs in the [[Grenoble:Hardware#servan|Servan]] nodes has the following characteristics:
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* JTAG
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** JTAG programming is provided on Xilinx Alveo U200 via a USB port on the card. In the Grid'5000 configuration, it is cabled back to hosting machine itself. Thus, programming of the FPGA of e.g. servan-1 can be done (e.g. with Vivado) from e.g. servan-1 itself.
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* Network
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** Both Ethernet ports of the FPGA are cabled to the site network along with all servers of the site (including the servan server NICs). [[File:Grenoble-DC-IMAG.png|thumb|right|Grenoble site's network]]
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** Ethernet ports are not shown as NICs in the operating system of the hosting machine (unless FPGA is programmed as to do so).
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** Ethernet ports are cabled to 100Gbps ports on Grenoble site router/switch. Switch ports are configured with Auto-Negotiation disabled and Speed forced to 100Gbps (not working otherwise, as far as we tested).
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** Kavlan is supported on the FPGA Ethernet ports just like any NIC of a server of the site (including the servan servers NICs). FPGA ports are named ''servan-1-fpga0'', ''servan-1-fpga1'', ''servan-2-fpga0'', ''servan-2-fpga1'' in kavlan. IP addresses are provided via DHCP to the FPGA ports in kavlan where the DHCP service is available.
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** Note: using the 100Gbps capability of the FPGA ports requires acquiring a free of charge Xilinx licence.
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* Wattmetre
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** The servan cluster is monitored by a wattmeter, providing the energy consumption of each server, including the FPGA.
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** Energy consumption can also be retrieve using Xilinx tools (e.g. xbutil, xbtop)when FPGA are used with XRT (see below).
  
By default, FGPAs have Xilinx XRT/Vitis enabled, but can also be programmed with Vivado.
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== Using the FPGA ==

Revision as of 14:41, 2 September 2022

As of August 2022, Grid'5000 features 2 nodes, each equipped with one AMD/Xilinx FPGA.

AMD Xilinx Alveo U200

Hardware description

The Grenoble site of Grid'5000 hosts 2 servers (Servan cluster) equipped with an AMD/Xilinx FPGA. FPGA are AMD/Xilinx Alveo U200, which are PCIe Accelerator card.

Detailed specifications are provided here (cards with passive thermal cooling).

Technically, the installation of those FPGAs in the Servan nodes has the following characteristics:

  • JTAG
    • JTAG programming is provided on Xilinx Alveo U200 via a USB port on the card. In the Grid'5000 configuration, it is cabled back to hosting machine itself. Thus, programming of the FPGA of e.g. servan-1 can be done (e.g. with Vivado) from e.g. servan-1 itself.
  • Network
    • Both Ethernet ports of the FPGA are cabled to the site network along with all servers of the site (including the servan server NICs).
      Grenoble site's network
    • Ethernet ports are not shown as NICs in the operating system of the hosting machine (unless FPGA is programmed as to do so).
    • Ethernet ports are cabled to 100Gbps ports on Grenoble site router/switch. Switch ports are configured with Auto-Negotiation disabled and Speed forced to 100Gbps (not working otherwise, as far as we tested).
    • Kavlan is supported on the FPGA Ethernet ports just like any NIC of a server of the site (including the servan servers NICs). FPGA ports are named servan-1-fpga0, servan-1-fpga1, servan-2-fpga0, servan-2-fpga1 in kavlan. IP addresses are provided via DHCP to the FPGA ports in kavlan where the DHCP service is available.
    • Note: using the 100Gbps capability of the FPGA ports requires acquiring a free of charge Xilinx licence.
  • Wattmetre
    • The servan cluster is monitored by a wattmeter, providing the energy consumption of each server, including the FPGA.
    • Energy consumption can also be retrieve using Xilinx tools (e.g. xbutil, xbtop)when FPGA are used with XRT (see below).

Using the FPGA